Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults

Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang, Cheng-Liang Tsai. Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults. In 5th Asian Test Symposium (ATS 96), November 20-22, 1996, Hsinchu, Taiwan. pages 100, IEEE Computer Society, 1996. [doi]

Abstract

Abstract is missing.