Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang, Cheng-Liang Tsai. Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults. In 5th Asian Test Symposium (ATS 96), November 20-22, 1996, Hsinchu, Taiwan. pages 100, IEEE Computer Society, 1996. [doi]
@inproceedings{LeeTHT96,
title = {Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults},
author = {Kuen-Jong Lee and Jing-Jou Tang and Tsung-Chu Huang and Cheng-Liang Tsai},
year = {1996},
url = {http://csdl.computer.org/comp/proceedings/ats/1996/7478/00/74780100abs.htm},
tags = {testing},
researchr = {https://researchr.org/publication/LeeTHT96},
cites = {0},
citedby = {0},
pages = {100},
booktitle = {5th Asian Test Symposium (ATS 96), November 20-22, 1996, Hsinchu, Taiwan},
publisher = {IEEE Computer Society},
}