Hao Li, Shuai Chen, Liqiong Yang, Rui Bai, Weiwu Hu, Freeman Y. Zhong, Samuel Palermo, Patrick Yin Chiang. A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS. In Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014. pages 1-2, IEEE, 2014. [doi]
@inproceedings{LiCYBHZPC14,
title = {A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS},
author = {Hao Li and Shuai Chen and Liqiong Yang and Rui Bai and Weiwu Hu and Freeman Y. Zhong and Samuel Palermo and Patrick Yin Chiang},
year = {2014},
doi = {10.1109/VLSIC.2014.6858399},
url = {http://dx.doi.org/10.1109/VLSIC.2014.6858399},
researchr = {https://researchr.org/publication/LiCYBHZPC14},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014},
publisher = {IEEE},
isbn = {978-1-4799-3327-3},
}