Peter Zhi Xuan Li, Hossein Kassiri, Roman Genov. A compact low-power VLSI architecture for real-time sleep stage classification. In IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016. pages 1314-1317, IEEE, 2016. [doi]
@inproceedings{LiKG16-0,
title = {A compact low-power VLSI architecture for real-time sleep stage classification},
author = {Peter Zhi Xuan Li and Hossein Kassiri and Roman Genov},
year = {2016},
doi = {10.1109/ISCAS.2016.7527490},
url = {http://dx.doi.org/10.1109/ISCAS.2016.7527490},
researchr = {https://researchr.org/publication/LiKG16-0},
cites = {0},
citedby = {0},
pages = {1314-1317},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016},
publisher = {IEEE},
isbn = {978-1-4799-5341-7},
}