Ziyu Li, Weiwei Shan, Chengjun Wu, Haitao Ge, Jun Yang 0006. An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator without Accuracy Loss in 28nm CMOS. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021. pages 1-3, IEEE, 2021. [doi]
@inproceedings{LiSWGY21,
title = {An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator without Accuracy Loss in 28nm CMOS},
author = {Ziyu Li and Weiwei Shan and Chengjun Wu and Haitao Ge and Jun Yang 0006},
year = {2021},
doi = {10.1109/A-SSCC53895.2021.9634809},
url = {https://doi.org/10.1109/A-SSCC53895.2021.9634809},
researchr = {https://researchr.org/publication/LiSWGY21},
cites = {0},
citedby = {0},
pages = {1-3},
booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021},
publisher = {IEEE},
isbn = {978-1-6654-4350-0},
}