Ran Li, Qi Zhao, Ting Yi, Zhiliang Hong. A 14-bit 2-GS/s DAC with SFDR>70dB up to 1-GHz in 65-nm CMOS. In 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011. pages 500-503, IEEE, 2011. [doi]
Abstract is missing.