John S. Liberty, Adrian Barrera, David W. Boerstler, Thomas B. Chadwick, Scott R. Cottier, H. Peter Hofstee, Julie A. Rosser, Marty L. Tsai. True hardware random number generation implemented in the 32-nm SOI POWER7+ processor. IBM Journal of Research and Development, 57(6), 2013. [doi]
@article{LibertyBBCCHRT13,
title = {True hardware random number generation implemented in the 32-nm SOI POWER7+ processor},
author = {John S. Liberty and Adrian Barrera and David W. Boerstler and Thomas B. Chadwick and Scott R. Cottier and H. Peter Hofstee and Julie A. Rosser and Marty L. Tsai},
year = {2013},
doi = {10.1147/JRD.2013.2279599},
url = {http://dx.doi.org/10.1147/JRD.2013.2279599},
researchr = {https://researchr.org/publication/LibertyBBCCHRT13},
cites = {0},
citedby = {0},
journal = {IBM Journal of Research and Development},
volume = {57},
number = {6},
}