Novel Circuit-Level Model for Gate Oxide Short and its Testing Method in SRAMs

Chen-Wei Lin, Mango Chia-Tso Chao, Chih-Chieh Hsu. Novel Circuit-Level Model for Gate Oxide Short and its Testing Method in SRAMs. IEEE Trans. VLSI Syst., 22(6):1294-1307, 2014. [doi]

Authors

Chen-Wei Lin

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Mango Chia-Tso Chao

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Chih-Chieh Hsu

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