A 1.5-GHz sub-sampling fractional-N PLL for spread-spectrum clock generator in 0.18-μm CMOS - researchr publication authors

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Chun-Yu Lin, Tun-Ju Wang, Tsung-Hsien Lin. A 1.5-GHz sub-sampling fractional-N PLL for spread-spectrum clock generator in 0.18-μm CMOS. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2017, Seoul, Korea (South), November 6-8, 2017. pages 253-256, IEEE, 2017. [doi]

This author has not been identified. Look up 'Chun-Yu Lin' in GoogleThis author has not been identified. Look up 'Tun-Ju Wang' in GoogleThis author has not been identified. Look up 'Tsung-Hsien Lin' in Google

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