Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures

Xinhan Lin, Shouyi Yin, Leibo Liu, Shaojun Wei. Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures. In 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016. pages 456-461, IEEE, 2016. [doi]

@inproceedings{LinYLW16,
  title = {Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures},
  author = {Xinhan Lin and Shouyi Yin and Leibo Liu and Shaojun Wei},
  year = {2016},
  doi = {10.1109/ASPDAC.2016.7428054},
  url = {http://dx.doi.org/10.1109/ASPDAC.2016.7428054},
  researchr = {https://researchr.org/publication/LinYLW16},
  cites = {0},
  citedby = {0},
  pages = {456-461},
  booktitle = {21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016},
  publisher = {IEEE},
  isbn = {978-1-4673-9569-4},
}