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A ReRAM Macro Using Dynamic Trip-Point-Mismatch Sampling Current-Mode Sense Amplifier and Low-DC Voltage-Mode Write-Termination Scheme Against Resistance and Write-Delay Variation

Chieh-Pu Lo, Wen-Zhang Lin, Wei-Yu Lin, Huan-Ting Lin, Tzu-Hsien Yang, Yen-Ning Chiang, Ya-Chin King, Chrong Jung Lin, Yu-Der Chih, Tsung-Yung Jonathon Chang, Meng-Fan Chang. A ReRAM Macro Using Dynamic Trip-Point-Mismatch Sampling Current-Mode Sense Amplifier and Low-DC Voltage-Mode Write-Termination Scheme Against Resistance and Write-Delay Variation. J. Solid-State Circuits, 54(2):584-595, 2019. [doi]

Authors

Chieh-Pu Lo

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Wen-Zhang Lin

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Wei-Yu Lin

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Huan-Ting Lin

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Tzu-Hsien Yang

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Yen-Ning Chiang

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Ya-Chin King

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Chrong Jung Lin

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Yu-Der Chih

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Tsung-Yung Jonathon Chang

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Meng-Fan Chang

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