Grater: An approximation workflow for exploiting data-level parallelism in FPGA acceleration - researchr publication authors

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Atieh Lotfi, Abbas Rahimi, Amir Yazdanbakhsh, Hadi Esmaeilzadeh, Rajesh K. Gupta. Grater: An approximation workflow for exploiting data-level parallelism in FPGA acceleration. In Luca Fanucci, Jürgen Teich, editors, 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016. pages 1279-1284, IEEE, 2016. [doi]

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