Design Techniques for a 66 Gb/s 46 mW 3-Tap Decision Feedback Equalizer in 65 nm CMOS

Yue Lu, Elad Alon. Design Techniques for a 66 Gb/s 46 mW 3-Tap Decision Feedback Equalizer in 65 nm CMOS. J. Solid-State Circuits, 48(12):3243-3257, 2013. [doi]

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