Tiantao Lu, Ankur Srivastava. Gated low-power clock tree synthesis for 3D-ICs. In Yuan Xie 0001, Tanay Karnik, Muhammad M. Khellah, Renu Mehra, editors, International Symposium on Low Power Electronics and Design, ISLPED'14, La Jolla, CA, USA - August 11 - 13, 2014. pages 319-322, ACM, 2014. [doi]
Abstract is missing.