Table of Contents

• Low power design techniques in mobile processesKarim Arabi. 1-2 [doi]
• EcoLaser: an adaptive laser control for energy-efficient on-chip photonic interconnectsYigit Demir, Nikos Hardavellas. 3-8 [doi]
• A model for array-based approximate arithmetic computing with application to multiplier and squarer designBotang Shao, Peng Li. 9-14 [doi]
• SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computingShankar Ganesh Ramasubramanian, Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan. 15-20 [doi]
• Adaptive front-end throttling for superscalar processorsWei Zhang, Hang Zhang, John Lach. 21-26 [doi]
• AxNN: energy-efficient neuromorphic systems using approximate computingSwagath Venkataramani, Ashish Ranjan, Kaushik Roy, Anand Raghunathan. 27-32 [doi]
• TONE: adaptive temperature optimization for the next generation video encodersDaniel Palomino, Muhammad Shafique, Altamiro Amadeu Susin, Jörg Henkel. 33-38 [doi]
• StoRM: a stochastic recognition and mining processorVinay K. Chippa, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan. 39-44 [doi]
• Approximate compressed sensing: ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processorDaniele Bortolotti, Hossein Mamaghanian, Andrea Bartolini, Maryam Ashouei, Jan Stuijt, David Atienza, Pierre Vandergheynst, Luca Benini. 45-50 [doi]
• An on-chip autonomous thermoelectric energy management system for energy-efficient active coolingBorislav Alexandrov, Khondker Z. Ahmed, Saibal Mukhopadhyay. 51-56 [doi]
• Tunnel FET-based ultra-low power, low-noise amplifier design for bio-signal acquisitionHuichu Liu, Mahsa Shoaran, Xueqing Li, Suman Datta, Alexandre Schmid, Vijaykrishnan Narayanan. 57-62 [doi]
• Performance modeling for emerging interconnect technologies in CMOS and beyond-CMOS circuitsSou-Chi Chang, Ahmet Ceyhan, Vachan Kumar, Azad Naeemi. 63-68 [doi]
• +-tree efficient in PCM-based main memoryPing Chi, Wang-Chien Lee, Yuan Xie. 69-74 [doi]
• Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memoryChenchen Fu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu. 75-80 [doi]
• DR. Swap: energy-efficient paging for smartphonesKan Zhong, Xiao Zhu, Tianzheng Wang, Dan Zhang, Xianlu Luo, Duo Liu, Weichen Liu, Edwin Hsing-Mean Sha. 81-86 [doi]
• Quasi-resonant clocking: a run-time control approach for true voltage-frequency-scalabilityVisvesh S. Sathe. 87-92 [doi]
• An energy-efficient 2.5D through-silicon interposer I/O with self-adaptive adjustment of output-voltage swingDongjun Xu, Sai Manoj Pudukotai Dinakarrao, Hantao Huang, Ningmei Yu, Hao Yu. 93-98 [doi]
• Reconfigurable regenerator-based interconnect design for ultra-dynamic-voltage-scaling systemsSeongjong Kim, Mingoo Seok. 99-104 [doi]
• Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenonWoojoo Lee, Yanzhi Wang, Tiansong Cui, Shahin Nazarian, Massoud Pedram. 105-110 [doi]
• Buffered clock tree synthesis considering self-heating effectsChung-Wei Lin, Tzu-Hsuan Hsu, Xin-Wei Shih, Yao-Wen Chang. 111-116 [doi]
• Therminator: a thermal simulator for smartphones producing accurate chip and skin temperature mapsQing Xie, Mohammad Javad Dousti, Massoud Pedram. 117-122 [doi]
• Challenges in low-power analog circuit design for sub-28nm CMOS technologiesAmr Fahim. 123-126 [doi]
• Process and design solutions for exploiting FD-SOI technology towards energy efficient SOCsPhilippe Flatresse. 127-130 [doi]
• Unified embedded non-volatile memory for emerging mobile marketsKangho Lee, Jimmy J. Kan, Seung H. Kang. 131-136 [doi]
• Failing to fail: achieving success in advanced low power design using UPFRick Koster, Sushma Honnavara Prasad, Shreedhar Ramachandra. 137-138 [doi]
• Accelerator-rich architectures: from single-chip to datacentersJingsheng Jason Cong. 139-140 [doi]
• GPUVolt: modeling and characterizing voltage noise in GPU architecturesJingwen Leng, Yazhou Zu, Minsoo Rhu, Meeta Sharma Gupta, Vijay Janapa Reddi. 141-146 [doi]
• Empirically derived abstractions in uncore power modeling for a server-class processor chipHans M. Jacobson, Arun Joseph, Dharmesh Parikh, Pradip Bose, Alper Buyuktosunoglu. 147-152 [doi]
• Content-driven memory pressure balancing and video memory power management for parallel high efficiency video codingFelipe Martin Sampaio, Muhammad Shafique, Bruno Zatt, Sergio Bampi, Jörg Henkel. 153-158 [doi]
• Software canaries: software-based path delay fault testing for variation-aware energy-efficient designJohn Sartori, Rakesh Kumar 0002. 159-164 [doi]
• Algorithms for power-efficient QoS in application specific NoCsHao He, Gongming Yang, Jiang Hu. 165-170 [doi]
• Design and CAD methodologies for low power gate-level monolithic 3D ICsShreepad A. Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim. 171-176 [doi]
• Efficient NBTI modeling technique considering recovery effectsReef Eilers, Malte Metzdorf, Domenik Helms, Wolfgang Nebel. 177-182 [doi]
• Bridging high performance and low power in processor designRuchir Puri, Mihir R. Choudhury, Haifeng Qian, Matthew M. Ziegler. 183-188 [doi]
• CASA: correlation-aware speculative addersGai Liu, Ye Tao, Mingxing Tan, Zhiru Zhang. 189-194 [doi]
• Synergistic circuit and system design for energy-efficient and robust domain wall cachesSeyedhamidreza Motaman, Anirudh Iyengar, Swaroop Ghosh. 195-200 [doi]
• Timing errors in LDPC decoding computations with overscaled supply voltageBehnam Sedighi, N. Prasanth Anthapadmanabhan, Dusan Suvakovic. 201-206 [doi]
• A case for leveraging 802.11p for direct phone-to-phone communicationsPilsoon Choi, Jason Gao, Nadesh Ramanathan, Mengda Mao, Shipeng Xu, Chirn Chye Boon, Suhaib A. Fahmy, Li-Shiuan Peh. 207-212 [doi]
• Leakage mitigation techniques in smartphone SoCsJohn Redmond. 213-214 [doi]
• 2.3 ppm/°c 40 nW MOSFET-only voltage referenceOscar E. Mattia, Hamilton Klimach, Sergio Bampi. 215-220 [doi]
• A bipolar ±40 MV self-starting boost converter with transformer reuse for thermoelectric energy harvestingNachiket V. Desai, Yogesh K. Ramadass, Anantha P. Chandrakasan. 221-226 [doi]
• Impact of process variation in inductive integrated voltage regulator on delay and power of digital circuitsMonodeep Kar, Sergio Carlo, Harish K. Krishnamurthy, Saibal Mukhopadhyay. 227-232 [doi]
• Aging mitigation of power supply-connected batteriesJaemin Kim, Alma Pröbstl, Samarjit Chakraborty, Naehyuck Chang. 233-238 [doi]
• Variation tolerant design of a vector processor for recognition, mining and synthesisVivek J. Kozhikkottu, Swagath Venkataramani, Sujit Dey, Anand Raghunathan. 239-244 [doi]
• Thermal-aware layout planning for heterogeneous datacentersReza Azimi, Xin Zhan, Sherief Reda. 245-250 [doi]
• QPR.js: a runtime framework for QoS-aware power optimization for parallel JavaScript programsWonjun Lee, Channoh Kim, Houp Song, Jae W. Lee. 251-254 [doi]
• Ultra-low voltage mixed TFET-MOSFET 8T SRAM cellYin-Nien Chen, Ming-Long Fan, Vita Pi-Ho Hu, Pin Su, Ching-Te Chuang. 255-258 [doi]
• a-SAD: power efficient SAD calculator for real time H.264 video encoder using MSB-approximation techniqueTrang Le Dinh Dang, Ik Joon Chang, Jinsang Kim. 259-262 [doi]
• Design exploration of racetrack lower-level cachesZhenyu Sun, Xiuyuan Bi, Alex K. Jones, Hai Li. 263-266 [doi]
• A compact macromodel for the charge phase of a battery with typical charging protocolDonghwa Shin, Alessandro Sassone, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino. 267-270 [doi]
• Energy efficient task scheduling on a multi-core platform using real-time energy measurementsDigvijay Singh, William J. Kaiser. 271-274 [doi]
• Energy-efficient mapping of biomedical applications on domain-specific accelerator under process variationMohammad Khavari Tavana, Amey M. Kulkarni, Abbas Rahimi, Tinoosh Mohsenin, Houman Homayoun. 275-278 [doi]
• A memory rename table to reduce energy and improve performanceJoseph Pusdesris, Benjamin VanderSloot, Trevor N. Mudge. 279-282 [doi]
• A deterministic-dither-based, all-digital system for on-chippower supply noise measurementKannan A. Sankaragomathi, William Anthony Smith, Brian P. Otis, Visvesh Sathe. 283-286 [doi]
• An open-source framework for formal specification and simulation of electrical energy systemsSara Vinco, Alessandro Sassone, Franco Fummi, Enrico Macii, Massimo Poncino. 287-290 [doi]
• Analysis and optimization of in-situ error detection techniques in ultra-low-voltage pipelineSeongjong Kim, Mingoo Seok. 291-294 [doi]
• Quantifying the impact of variability on the energy efficiency for a next-generation ultra-green supercomputerFrancesco Fraternali, Andrea Bartolini, Carlo Cavazzoni, Giampietro Tecchiolli, Luca Benini. 295-298 [doi]
• MIN: a power efficient mechanism to mitigate the impact of process variations on nanophotonic networksMajed Valad Beigi, Gokhan Memik. 299-302 [doi]
• EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessorsHsiang-Yun Cheng, Matthew Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie 0001. 303-306 [doi]
• A digital dynamic write margin sensor for low power read/write operations in 28nm SRAMPeter Beshay, Vikas Chandra, Rob Aitken, Benton H. Calhoun. 307-310 [doi]
• Smart butterfly: reducing static power dissipation of network-on-chip with core-state-awarenessSiyu Yue, Lizhong Chen, Di Zhu, Timothy Mark Pinkston, Massoud Pedram. 311-314 [doi]
• Energy-efficient dot product computation using a switched analog circuit architectureIhab Nahlus, Eric P. Kim, Naresh R. Shanbhag, David Blaauw. 315-318 [doi]
• Gated low-power clock tree synthesis for 3D-ICsTiantao Lu, Ankur Srivastava. 319-322 [doi]
• Unlocking the true potential of 3D CPUs with micro-fluidic coolingCaleb Serafy, Ankur Srivastava, Donald Yeung. 323-326 [doi]
• Prolonging PCM lifetime through energy-efficient, segment-aware, and wear-resistant page allocationHoda Aghaei Khouzani, Yuan Xue, Chengmo Yang, Archana Pandurangi. 327-330 [doi]
• The new (system) balance of power and opportunities for optimizationsParthasarathy Ranganathan. 331-332 [doi]
• eDRAM-based tiered-reliability memory with applications to low-power frame buffersKyungsang Cho, Yongjun Lee, Young H. Oh, Gyoo-Cheol Hwang, Jae W. Lee. 333-338 [doi]
• Enabling high-performance LPDDRx-compatible MRAMJue Wang, Xiangyu Dong, Yuan Xie. 339-344 [doi]
• SBAC: a statistics based cache bypassing method for asymmetric-access cachesChao Zhang, Guangyu Sun, Peng Li, Tao Wang, Dimin Niu, Yiran Chen. 345-350 [doi]
• Tag check elisionZhong Zheng, Zhiying Wang, Mikko H. Lipasti. 351-356 [doi]
• Fast photovoltaic array reconfiguration for partial solar powered vehiclesJaemin Kim, Yanzhi Wang, Massoud Pedram, Naehyuck Chang. 357-362 [doi]
• Energy harvesting from anti-corrosion power sourcesSehwan Kim, Minseok Lee, Pai H. Chou. 363-368 [doi]
• Intelligent frame refresh for energy-aware display subsystems in mobile devicesYongbing Huang, Mingyu Chen, Lixin Zhang 0002, Shihai Xiao, Junfeng Zhao, Zhulin Wei. 369-374 [doi]
• Powering the internet of thingsHrishikesh Jayakumar, Kangwoo Lee, Woo Suk Lee, Arnab Raha, Younghyun Kim, Vijay Raghunathan. 375-380 [doi]