Chi-Chang Lu, Jyun-Yi Wu, Tsung-Sum Lee. A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 1955-1958, IEEE, 2007. [doi]
Abstract is missing.