Parameter optimization of Sallen-Key filters for removing DC voltage and high-order harmonics in PLL outputs while minimizing passband gain variation

Haibo Luo, Jianqiang Han, Ying Zhang, Weiwei Cao, Ge Shi 0001. Parameter optimization of Sallen-Key filters for removing DC voltage and high-order harmonics in PLL outputs while minimizing passband gain variation. Microelectronics Journal, 171:107121, 2026. [doi]

Abstract

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