Delay testing of partially depleted silicon-on-insulator (PD-SOI) circuits

Eric MacDonald, Nur A. Touba. Delay testing of partially depleted silicon-on-insulator (PD-SOI) circuits. IEEE Trans. VLSI Syst., 14(6):587-595, 2006. [doi]

Authors

Eric MacDonald

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Nur A. Touba

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