A self-referenced on-chip jitter BIST with sub-picosecond resolution in 28 nm FD-SOI technology - researchr publication authors

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Manasa Madhvaraj, Salvador Mir, Manuel J. Barragan. A self-referenced on-chip jitter BIST with sub-picosecond resolution in 28 nm FD-SOI technology. In 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022. pages 1-6, IEEE, 2022. [doi]

This author has not been identified. Look up 'Manasa Madhvaraj' in GoogleThis author has not been identified. Look up 'Salvador Mir' in GoogleThis author has not been identified. Look up 'Manuel J. Barragan' in Google

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