Manasa Madhvaraj, Salvador Mir, Manuel J. Barragan. A self-referenced on-chip jitter BIST with sub-picosecond resolution in 28 nm FD-SOI technology. In 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022. pages 1-6, IEEE, 2022. [doi]
@inproceedings{MadhvarajMB22,
title = {A self-referenced on-chip jitter BIST with sub-picosecond resolution in 28 nm FD-SOI technology},
author = {Manasa Madhvaraj and Salvador Mir and Manuel J. Barragan},
year = {2022},
doi = {10.1109/VLSI-SoC54400.2022.9939620},
url = {https://doi.org/10.1109/VLSI-SoC54400.2022.9939620},
researchr = {https://researchr.org/publication/MadhvarajMB22},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022},
publisher = {IEEE},
isbn = {978-1-6654-9005-4},
}