A self-referenced on-chip jitter BIST with sub-picosecond resolution in 28 nm FD-SOI technology

Manasa Madhvaraj, Salvador Mir, Manuel J. Barragan. A self-referenced on-chip jitter BIST with sub-picosecond resolution in 28 nm FD-SOI technology. In 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022. pages 1-6, IEEE, 2022. [doi]

Abstract

Abstract is missing.