Design validation of .18 μm 1 GHz cache and register arrays - researchr publication authors

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Doug Malone, Paul Bunce, Joe DellaPietro, John Davis, James Dawson, Thomas J. Knips, Don Plass, Phil Pritzlaff, Kenneth Reyer. Design validation of .18 μm 1 GHz cache and register arrays. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 295-298, IEEE, 2000. [doi]

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