Doug Malone, Paul Bunce, Joe DellaPietro, John Davis, James Dawson, Thomas J. Knips, Don Plass, Phil Pritzlaff, Kenneth Reyer. Design validation of .18 μm 1 GHz cache and register arrays. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 295-298, IEEE, 2000. [doi]
@inproceedings{MaloneBDDDKPPR00,
title = {Design validation of .18 μm 1 GHz cache and register arrays},
author = {Doug Malone and Paul Bunce and Joe DellaPietro and John Davis and James Dawson and Thomas J. Knips and Don Plass and Phil Pritzlaff and Kenneth Reyer},
year = {2000},
doi = {10.1109/CICC.2000.852670},
url = {https://doi.org/10.1109/CICC.2000.852670},
researchr = {https://researchr.org/publication/MaloneBDDDKPPR00},
cites = {0},
citedby = {0},
pages = {295-298},
booktitle = {Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000},
publisher = {IEEE},
isbn = {0-7803-5809-0},
}