The following publications are possibly variants of this publication:
- Hybrid Cache Designs for Reliable Hybrid High and Ultra-Low Voltage OperationBojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero. todaes, 20(1):10, 2014. [doi]
- Cache designs for reliable hybrid high and ultra-low voltage operationBojan Maric. PhD thesis, Polytechnic University of Catalonia, Spain, 2014. [doi]
- Efficient cache architectures for reliable hybrid voltage operation using EDC codesBojan Maric, Jaume Abella, Mateo Valero. date 2013: 917-920 [doi]
- Hybrid high-performance low-power and ultra-low energy reliable cachesBojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero. cf 2011: 12 [doi]
- Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC CodesBojan Maric, Jaume Abella, Mateo Valero. tvlsi, 22(10):2211-2215, 2014. [doi]