Chizu Matsumoto, Yuichi Hamamura, Michinobu Nakao, Kaname Yamasaki, Yoshikazu Saito, Shun'ichi Kaneko. Novel Fuse Scheme with a Short Repair Time to Maximize Good Chips per Wafer in Advanced SoCs. IEICE Transactions, 96-C(1):108-114, 2013. [doi]
Abstract is missing.