An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology - researchr publication

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Tetsuro Matsuno, Daisuke Fujimoto, Daisuke Kosaka, Naoyuki Hamanishi, Ken Tanabe, Masazumi Shiochi, Makoto Nagata. An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology. IEICE Transactions, 93-C(6):820-826, 2010. [doi]

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