Hugh McIntyre, Dennis Wendell, K. James Lin, P. Kaushik, Suresh Seshadri, Alfred Wang, V. Sundararaman, Ping Wang, Song Kim, Wen-Jay Hsu, Hee-Choul Park, Gideon Levinsky, Jiejun Lu, M. Chirania, Raymond A. Heald, Paul Lazar, Sanjaya Dharmasena. A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. J. Solid-State Circuits, 40(1):52-59, 2005. [doi]
Abstract is missing.