Ioannis Messaris, Alexander Serb, Spyros Stathopoulos, Ali Khiat, Spyridon Nikolaidis, Themistoklis Prodromakis. A Data-Driven Verilog-A ReRAM Model. IEEE Trans. on CAD of Integrated Circuits and Systems, 37(12):3151-3162, 2018. [doi]
@article{MessarisSSKNP18,
title = {A Data-Driven Verilog-A ReRAM Model},
author = {Ioannis Messaris and Alexander Serb and Spyros Stathopoulos and Ali Khiat and Spyridon Nikolaidis and Themistoklis Prodromakis},
year = {2018},
doi = {10.1109/TCAD.2018.2791468},
url = {https://doi.org/10.1109/TCAD.2018.2791468},
researchr = {https://researchr.org/publication/MessarisSSKNP18},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {37},
number = {12},
pages = {3151-3162},
}