A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques - researchr publication authors

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Takuji Miki, Takashi Morie, Kazuo Matsukawa, Yoji Bando, Takeshi Okumoto, Koji Obata, Shiro Sakiyama, Shiro Dosho. A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques. J. Solid-State Circuits, 50(6):1372-1381, 2015. [doi]

This author has not been identified. Look up 'Takuji Miki' in GoogleThis author has not been identified. Look up 'Takashi Morie' in GoogleThis author has not been identified. Look up 'Kazuo Matsukawa' in GoogleThis author has not been identified. Look up 'Yoji Bando' in GoogleThis author has not been identified. Look up 'Takeshi Okumoto' in GoogleThis author has not been identified. Look up 'Koji Obata' in GoogleThis author has not been identified. Look up 'Shiro Sakiyama' in GoogleThis author has not been identified. Look up 'Shiro Dosho' in Google

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