Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits

Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai. Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits. In 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France. pages 1327-1333, IEEE Computer Society, 2004. [doi]

Authors

Takashi Mine

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Hidemasa Kubota

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Atsushi Kamo

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Takayuki Watanabe

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Hideki Asai

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