Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits

Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai. Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits. In 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France. pages 1327-1333, IEEE Computer Society, 2004. [doi]

@inproceedings{MineKKWA04,
  title = {Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits},
  author = {Takashi Mine and Hidemasa Kubota and Atsushi Kamo and Takayuki Watanabe and Hideki Asai},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/date/2004/2085/02/208521327abs.htm},
  researchr = {https://researchr.org/publication/MineKKWA04},
  cites = {0},
  citedby = {0},
  pages = {1327-1333},
  booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2085-5},
}