A verilog-a model for reconfigurable logic gates based on graphene pn-junctions

Sandeep Miryala, Mehrdad Montazeri, Andrea Calimera, Enrico Macii, Massimo Poncino. A verilog-a model for reconfigurable logic gates based on graphene pn-junctions. In Enrico Macii, editor, Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013. pages 877-880, EDA Consortium San Jose, CA, USA / ACM DL, 2013. [doi]

Authors

Sandeep Miryala

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Mehrdad Montazeri

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Andrea Calimera

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Enrico Macii

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Massimo Poncino

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