Sandeep Miryala, Mehrdad Montazeri, Andrea Calimera, Enrico Macii, Massimo Poncino. A verilog-a model for reconfigurable logic gates based on graphene pn-junctions. In Enrico Macii, editor, Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013. pages 877-880, EDA Consortium San Jose, CA, USA / ACM DL, 2013. [doi]
@inproceedings{MiryalaMCMP13,
title = {A verilog-a model for reconfigurable logic gates based on graphene pn-junctions},
author = {Sandeep Miryala and Mehrdad Montazeri and Andrea Calimera and Enrico Macii and Massimo Poncino},
year = {2013},
url = {http://dl.acm.org/citation.cfm?id=2485499},
researchr = {https://researchr.org/publication/MiryalaMCMP13},
cites = {0},
citedby = {0},
pages = {877-880},
booktitle = {Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013},
editor = {Enrico Macii},
publisher = {EDA Consortium San Jose, CA, USA / ACM DL},
isbn = {978-1-4503-2153-2},
}