Noriyuki Miura, Naoki Kato, Tadahiro Kuroda. Practical methodology of post-layout gate sizing for 15 more power saving. In Masaharu Imai, editor, Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004. pages 434-437, IEEE, 2004. [doi]
@inproceedings{MiuraKK04,
title = {Practical methodology of post-layout gate sizing for 15 more power saving},
author = {Noriyuki Miura and Naoki Kato and Tadahiro Kuroda},
year = {2004},
doi = {10.1145/1015090.1015199},
url = {http://doi.acm.org/10.1145/1015090.1015199},
tags = {layout},
researchr = {https://researchr.org/publication/MiuraKK04},
cites = {0},
citedby = {0},
pages = {434-437},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004},
editor = {Masaharu Imai},
publisher = {IEEE},
isbn = {0-7803-8175-0},
}