Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Y. Kawamoto, K. Takagi, Shusuke Yoshimoto, Shintaro Izumi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto. A 298-fJ/writecycle 650-fJ/readcycle 8T three-port SRAM in 28-nm FD-SOI process technology for image processor. In 2015 IEEE Custom Integrated Circuits Conference, CICC 2015, San Jose, CA, USA, September 28-30, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{MoriNKKTYINKY15,
title = {A 298-fJ/writecycle 650-fJ/readcycle 8T three-port SRAM in 28-nm FD-SOI process technology for image processor},
author = {Haruki Mori and Tomoki Nakagawa and Yuki Kitahara and Y. Kawamoto and K. Takagi and Shusuke Yoshimoto and Shintaro Izumi and Koji Nii and Hiroshi Kawaguchi and Masahiko Yoshimoto},
year = {2015},
doi = {10.1109/CICC.2015.7338360},
url = {http://dx.doi.org/10.1109/CICC.2015.7338360},
researchr = {https://researchr.org/publication/MoriNKKTYINKY15},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {2015 IEEE Custom Integrated Circuits Conference, CICC 2015, San Jose, CA, USA, September 28-30, 2015},
publisher = {IEEE},
isbn = {978-1-4799-8682-8},
}