Process variation effects on circuit performance: TCAD simulation of 256-Mbit technology [DRAMs]

C. S. Murthy, M. Gall. Process variation effects on circuit performance: TCAD simulation of 256-Mbit technology [DRAMs]. IEEE Trans. on CAD of Integrated Circuits and Systems, 16(11):1383-1389, 1997. [doi]

Authors

C. S. Murthy

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M. Gall

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