C. S. Murthy, M. Gall. Process variation effects on circuit performance: TCAD simulation of 256-Mbit technology [DRAMs]. IEEE Trans. on CAD of Integrated Circuits and Systems, 16(11):1383-1389, 1997. [doi]
@article{MurthyG97:0,
title = {Process variation effects on circuit performance: TCAD simulation of 256-Mbit technology [DRAMs]},
author = {C. S. Murthy and M. Gall},
year = {1997},
doi = {10.1109/43.663828},
url = {http://doi.ieeecomputersociety.org/10.1109/43.663828},
tags = {C++},
researchr = {https://researchr.org/publication/MurthyG97%3A0},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {16},
number = {11},
pages = {1383-1389},
}