Switch Block Architecture for Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals

Yoshihiro Nakatani, Masanori Hariyama, Michitaka Kameyama. Switch Block Architecture for Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals. In 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 17-20 May 2006, Singapore. pages 17, IEEE Computer Society, 2006. [doi]

Abstract

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