Yoshihiro Nakatani - researchr alias

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Viewing Publication 1 - 4 from 4

2011

A Switch Block for Multi-Context FPGAs Based on Floating-Gate-MOS Functional Pass-Gates Using Multiple/Binary Valued Hybrid Signals?Shota Ishihara, Noriaki Idobata, Yoshihiro Nakatani, Masanori Hariyama. mvl, 17(5-6):553-580, 2011. [doi]

2006

Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signalYoshihiro Nakatani, Masanori Hariyama, Michitaka Kameyama. ipps 2006: [doi]

Switch Block Architecture for Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching SignalsYoshihiro Nakatani, Masanori Hariyama, Michitaka Kameyama. ismvl 2006: 17 [doi]

2005

Dynamic Multi-Context Reconfiguration Scheme for Reconfigurable Parallel Image Processing System with Three Dimensional StructureTakeaki Sugimura, Yuta Konishi, Yoshihiro Nakatani, Takafumi Fukushima, Hiroyuki Kurino, Mitsumasa Koyanagi. arcs 2005: 27-32

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