Characterizing Individual Gate Power Sensitivity in Low Power Design - researchr publication

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Unni Narayanan, Georgios I. Stamoulis, Rabindra K. Roy. Characterizing Individual Gate Power Sensitivity in Low Power Design. In 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India. pages 625, IEEE Computer Society, 1999.

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