FPGA Implementation of a Maze Routing Accelerator

John A. Nestor. FPGA Implementation of a Maze Routing Accelerator. In Peter Y. K. Cheung, George A. Constantinides, José T. de Sousa, editors, Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings. Volume 2778 of Lecture Notes in Computer Science, pages 992-995, Springer, 2003. [doi]

@inproceedings{Nestor03,
  title = {FPGA Implementation of a Maze Routing Accelerator},
  author = {John A. Nestor},
  year = {2003},
  url = {http://springerlink.metapress.com/openurl.asp?genre=article&issn=0302-9743&volume=2778&spage=992},
  tags = {routing},
  researchr = {https://researchr.org/publication/Nestor03},
  cites = {0},
  citedby = {0},
  pages = {992-995},
  booktitle = {Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
  editor = {Peter Y. K. Cheung and George A. Constantinides and José T. de Sousa},
  volume = {2778},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-40822-3},
}