John A. Nestor - researchr alias

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Viewing Publication 1 - 25 from 25

2021

Experiences with Remote Teaching an Embedded Systems CourseJohn A. Nestor. glvlsi 2021: 437-442 [doi]

2017

From microelectronics to making: Incorporating microelectronics in a first-year engineering courseJohn A. Nestor. mse 2017: 27-30 [doi]

2011

An undergraduate embedded systems projectJohn F. Greco, John A. Nestor. mse 2011: 43-46 [doi]

HDL coding guidelines for student projectsJohn A. Nestor. mse 2011: 86-89 [doi]

2010

VCache: visualization applet for processor cachesBerkin Ilbeyi, John A. Nestor. iticse 2010: 304 [doi]

2009

An FPGA-based wireless network capstone projectJohn A. Nestor, Chris Nadovich. mse 2009: 53-56 [doi]

2008

Experience With the CADAPPLETS ProjectJohn A. Nestor. te, 51(3):342-348, 2008. [doi]

2007

L4: An FPGA-Based Accelerator for Detailed Maze RoutingJohn A. Nestor, Jeremy Lavine. fpl 2007: 357-362 [doi]

Experience with the CADAPPLETS ProjectJohn A. Nestor. mse 2007: 169-170 [doi]

2005

L3: An FPGA-based multilayer maze routing acceleratorJohn A. Nestor. mam, 29(2-3):87-97, 2005. [doi]

Teaching Computer Organization with HDLs: An Incremental ApproachJohn A. Nestor. mse 2005: 77-78 [doi]

2003

FPGA Implementation of a Maze Routing AcceleratorJohn A. Nestor. fpl 2003: 992-995 [doi]

Integrating Digital, Analog, and Mixed-Signal Design in an Undergraduate ECE CurriculumJohn A. Nestor, David A. Rich. mse 2003: 89-90 [doi]

2002

A new look at hardware maze routingJohn A. Nestor. glvlsi 2002: 142-147 [doi]

2001

Web-Based Visualization Tools for Teaching VLSI CAD AlgorithmsJohn A. Nestor. mse 2001: 100-101 [doi]

1993

SALSA: a new approach to scheduling with timing constraintsJohn A. Nestor, Ganesh Krishnamoorthy. tcad, 12(8):1107-1122, 1993. [doi]

Visual register-transfer description of VLSI microarchitecturesJohn A. Nestor. tvlsi, 1(1):72-76, 1993. [doi]

SALSE II: A Fast Transformational Scheduler for High-level SynthesisMichael R. Rhinehart, John A. Nestor. iscas 1993: 1678-1681

1992

Data Path Allocation using an Extended Binding ModelGanesh Krishnamoorthy, John A. Nestor. dac 1992: 279-284 [doi]

1990

SALSA: A New Approach to Scheduling with Timing ConstraintsJohn A. Nestor, Ganesh Krishnamoorthy. iccad 1990: 262-265

1989

MIES: a microarchitecture design toolJohn A. Nestor, Bassel Soudan, Zubair Mayet. micro 1989: 217-222 [doi]

1988

The System Architect s WorkbenchDonald E. Thomas, Elizabeth M. Dirkes, Robert A. Walker, Jayanth V. Rajan, John A. Nestor, Robert L. Blackburn. dac 1988: 337-343 [doi]

1984

DIF: A framework for VLSI multi-level representationDavid P. LaPotin, Sani R. Nassif, Jayanth V. Rajan, Michael L. Bushnell, John A. Nestor. integration, 2(3):227-241, 1984. [doi]

1983

Defining and Implementing a Multilevel Design Representation with Simulation ApplicationsDonald E. Thomas, John A. Nestor. tcad, 2(3):135-145, 1983. [doi]

1982

Defining and implementing a multilevel design representation with simulation applicationsJohn A. Nestor, Donald E. Thomas. dac 1982: 740-746 [doi]

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