Partial Reset Methodologies for Improving Random-Pattern Testability and BIST of Sequential Circuits

Huy Nguyen, Rabindra K. Roy, Abhijit Chatterjee. Partial Reset Methodologies for Improving Random-Pattern Testability and BIST of Sequential Circuits. In 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India. pages 199-204, IEEE Computer Society, 1998.

Abstract

Abstract is missing.