Modeling and Experimental Verification of Misalignment Tolerance in Inductive-Coupling Inter-Chip Link for Low-Power 3-D System Integration - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Kiichi Niitsu, Yoshinori Kohama, Yasufumi Sugimori, Kazutaka Kasuga, Kenichi Osada, Naohiko Irie, Hiroki Ishikuro, Tadahiro Kuroda. Modeling and Experimental Verification of Misalignment Tolerance in Inductive-Coupling Inter-Chip Link for Low-Power 3-D System Integration. IEEE Trans. VLSI Syst., 18(8):1238-1243, 2010. [doi]

This author has not been identified. Look up 'Kiichi Niitsu' in GoogleThis author has not been identified. Look up 'Yoshinori Kohama' in GoogleThis author has not been identified. Look up 'Yasufumi Sugimori' in GoogleThis author has not been identified. Look up 'Kazutaka Kasuga' in GoogleThis author has not been identified. Look up 'Kenichi Osada' in GoogleThis author has not been identified. Look up 'Naohiko Irie' in GoogleThis author has not been identified. Look up 'Hiroki Ishikuro' in GoogleThis author has not been identified. Look up 'Tadahiro Kuroda' in Google

runs on WebDSL