Low-Power, Energy-Efficient Full Adder for Deep-Submicron Design

Mallikarjuna Rao Nimmagadda, Ajit Pal. Low-Power, Energy-Efficient Full Adder for Deep-Submicron Design. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 345-346, IEEE Computer Society, 2011. [doi]

Authors

Mallikarjuna Rao Nimmagadda

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Ajit Pal

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