System-level power-performance trade-offs in task scheduling for dynamically reconfigurable architectures

Juanjo Noguera, Rosa M. Badia. System-level power-performance trade-offs in task scheduling for dynamically reconfigurable architectures. In Jaime H. Moreno, Praveen K. Murthy, Thomas M. Conte, Paolo Faraboschi, editors, Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2003, San Jose, California, USA, October 30 - November 1, 2003. pages 73-83, ACM, 2003. [doi]

Abstract

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