Jaime H. Moreno - researchr alias

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Viewing Publication 1 - 26 from 26

2019

Preparation and optimization of a diverse workload for a large-scale heterogeneous systemIan Karlin, Yoonho Park, Bronis R. de Supinski, Peng Wang, Bert Still, David Beckingsale, Robert Blake, Tong Chen, Guojing Cong, Carlos H. A. Costa, Johann Dahm, Giacomo Domeniconi, Thomas Epperly, Aaron Fisher, Sara Kokkila Schumacher, Steven H. Langer, Hai Le, Eun-Kyung Lee, Naoya Maruyama, Xinyu Que, David F. Richards, Björn Sjögreen, Jonathan Wong, Carol S. Woodward, Ulrike Meier Yang, Xiaohua Zhang, Bob Anderson, David Appelhans, Levi Barnes, Peter D. Barnes Jr., Sorin Bastea, David Böhme, Jamie A. Bramwell, James M. Brase, José R. Brunheroto, Barry Chen, Charway R. Cooper, Tony Degroot, Robert D. Falgout, Todd Gamblin, David J. Gardner, James N. Glosli, John A. Gunnels, Max Katz, Tzanio V. Kolev, I-Feng W. Kuo, Matthew P. LeGendre, Ruipeng Li, Pei-Hung Lin, Shelby Lockhart, Kathleen McCandless, Claudia Misale, Jaime H. Moreno, Rob Neely, Jarom Nelson, Rao Nimmakayala, Kathryn M. O'Brien, Kevin O'Brien, Ramesh Pankajakshan, Roger Pearce, Slaven Peles, Phil Regier, Steve Rennich, Martin Schulz 0001, Howard Scott, James C. Sexton, Kathleen Shoga, Shiv Sundram, Guillaume Thomas-Collignon, Brian Van Essen, Alexey Voronin, Bob Walkup, Lu Wang, Chris Ward, Hui-Fang Wen, Daniel A. White, Christopher Young, Cyril Zeller, Edward Zywicz. sc 2019: [doi]

Benchmarking Summit and Sierra Supercomputers : From Proposal to AcceptanceJaime H. Moreno, Hui-Fang Wen. ieeehpcs 2019: 428-435 [doi]

2016

Near-Memory Data ServicesBabak Falsafi, Mircea Stan, Kevin Skadron, Nuwan Jayasena, Yunji Chen, Jinhua Tao, Ravi Nair, Jaime H. Moreno, Naveen Muralimanohar, Karthikeyan Sankaralingam, Cristian Estan. micro, 36(1):6-13, 2016. [doi]

2015

2014

2009

True value: assessing and optimizing the cost of computing at the data center levelJohn P. Karidis, José E. Moreira, Jaime H. Moreno. cf 2009: 185-192 [doi]

2006

Chip-level integration: the new frontier for microprocessor architectureJaime H. Moreno. spaa 2006: 328 [doi]

2004

Design methodology for semi custom processor coresVictor V. Zyuban, Sameh W. Asaad, Thomas W. Fox, Anne-Marie Haen, Daniel Littrell, Jaime H. Moreno. glvlsi 2004: 448-452 [doi]

2003

1999

Validation of Turandot, a fast processor model for microarchitecture explorationMayan Moudgill, P. Bose, Jaime H. Moreno. ipccc 1999: 451-457 [doi]

Environment for PowerPC microarchitecture explorationMayan Moudgill, John-David Wellman, Jaime H. Moreno. micro, 19(3):15-25, 1999. [doi]

1997

Simulation/evaluation environment for a VLIW processor architectureJaime H. Moreno, Mayan Moudgill, Kemal Ebcioglu, Erik R. Altman, C. Brian Hall, Rene Miranda, Shyh-Kwei Chen, Arkady Polyak. ibmrd, 41(3):287-302, 1997. [doi]

Scalable Instruction-Level Parallelism Through Tree-InstructionsJaime H. Moreno, Mayan Moudgill. ics 1997: 1-11 [doi]

1993

IntroductionTomás Lang, Jaime H. Moreno. vlsisp, 5(1):6, 1993. [doi]

1992

MAMACG: a tool for automatic mapping of matrix algorithms onto mesh array computational graphsDinh Lê, Milos D. Ercegovac, Tomás Lang, Jaime H. Moreno. asap 1992: 511-525 [doi]

1991

Linear pseudosystolic array for partitioned matrix algorithmsJaime H. Moreno, Miguel E. Figueroa, Tomás Lang. vlsisp, 3(3):201-214, 1991. [doi]

A decoupled access/execute processor for matrix algorithms: architecture and programmingJaime H. Moreno, Miguel E. Figueroa. asap 1991: 281-295 [doi]

1990

Matric Computations on Systolic-Type MeshesJaime H. Moreno, Tomás Lang. Computer, 23(4):32-51, 1990.

A graph-based approach to map matrix algorithms onto local-access processor arraysJaime H. Moreno, Tomás Lang. asap 1990: 641-652 [doi]

1989

-1'Jaime H. Moreno, Tomás Lang. tsp, 37(11):1786-1789, 1989. [doi]

1988

Graph-based Partitioning of Matrix Algorithms for Systolic Arrays: Application to Transitive ClosureJaime H. Moreno, Tomás Lang. icpp 1988: 28-31

1986

Replication and Pipelining in Multiple-Instance AlgorithmsJaime H. Moreno, Tomás Lang. icpp 1986: 285-292

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