A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology

Shuou Nomura, Fumihiko Tachibana, Tetsuya Fujita, Chen Kong Teh, Hiroyuki Usui, Fumiyuki Yamane, Yukimasa Miyamoto, Chaiyasit Kumtornkittikul, Hiroyuki Hara, Takahiro Yamashita, Jun Tanabe, Masaru Uchiyama, Y. Tsuboi, Takashi Miyamori, Takeshi Kitahara, Hironori Sato, Y. Homma, S. Matsumoto, K. Seki, Y. Watanabe, Mototsugu Hamada, Makoto Takahashi. A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology. In 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. pages 262-263, IEEE, 2008. [doi]

Abstract

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