Partitioning and Placement Technique for CMOS Gate Arrays

Gotaro Odawara, Takahisa Hiraide, Osamu Nishina. Partitioning and Placement Technique for CMOS Gate Arrays. IEEE Trans. on CAD of Integrated Circuits and Systems, 6(3):355-363, 1987. [doi]

Authors

Gotaro Odawara

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Takahisa Hiraide

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Osamu Nishina

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