Toru Okazaki, Daisuke Kanemoto, Ramesh K. Pokharel, Keiji Yoshida, Haruichi Kanaya. A design methodology for SAR ADC optimal redundancy bit. IEICE Electronic Express, 11(10):20140218, 2014. [doi]
@article{OkazakiKPYK14,
title = {A design methodology for SAR ADC optimal redundancy bit},
author = {Toru Okazaki and Daisuke Kanemoto and Ramesh K. Pokharel and Keiji Yoshida and Haruichi Kanaya},
year = {2014},
doi = {10.1587/elex.11.20140218},
url = {http://dx.doi.org/10.1587/elex.11.20140218},
researchr = {https://researchr.org/publication/OkazakiKPYK14},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {11},
number = {10},
pages = {20140218},
}